1. Field of the Invention
The present invention relates to design of switches in integrated circuits and more specifically to a switch provided between terminals with a terminal voltage potentially exceeding the voltage level of a control signal designed to turn the switch on or off.
2. Related Art
Switches are often used to connect two terminals in an integrated circuit. In general, the two terminals are connected in one state of the switch and disconnected in another state. A control signal specifies the specific state in which the switch is to operate, and thus whether to turn the switch on or off. There is often a need to provide such switches when the cross-terminal voltage exceeds the voltage level of the control signal as described below with reference to an example device of FIG. 1.
FIG. 1 is a block diagram illustrating the operation and details of an example environment in which switches are operated between two terminal with varying terminal voltage (resulting in variations in cross terminal voltage). Device 190 (such as a digital camera or a scanner) receives light 119 emanating from image (object) 110 and generates pixel data elements representing image 110. The pixel data elements may be forwarded on path 168, and used in several ways, for example, viewed/edited by computer system 180_1, stored in floppy disk 180_2, printed on printer 180_3 or transferred to video player 180_4.
Device 190 is shown containing lens 120, CCD (Charge Coupled Device) 130, analog front end (AFE) 100 and post processor 160. Light 119 from image 110 is shown being focused on CCD 130 by lens 120. CCD 130 contains several pixels, with each pixel being charged proportionate to the product of the intensity of the incident light and the time of exposure to the light. The charge is converted into voltage in a known way and transferred to AFE 100 on path 101.
Post processor 160 (example of a processor) processes the digital values received on path 133, generally to enhance the quality of image represented by the digital values and/or to convert the data into suitable format for storing. The resulting output data on path 168 may be used in several ways by one of the external devices, for example, displayed on monitor 180-1, stored on floppy 180-2, printed on printer 180-3, or provided as an input to video camera 180-4.
AFE 100 converts the input signal received on path 101 into digital values representing the image, and transmits the digital values to post processor 160 on path 133. AFE 100 contains (uses) a switch connecting terminals with varying cross-terminal voltage, as described below with reference to FIGS. 2 and 3 below.
FIG. 2 is block diagram illustrating the details of AFE 100 in one embodiment. AFE 100 is shown containing clamping circuit 250, programmable gain amplifier (PGA) 260 and analog to digital converter (ADC) 280. Each block is described below in further detail.
Clamping circuit 250 is shown containing capacitor 210 and switch 220. Capacitor 210 is shown receiving signal on path 101, and switch 220 is shown connected between the other terminal (256) of capacitor 210 and Vdd. Due to such a configuration, clamping circuit 250 operates to clamp a reference point on the input signal (101) to a supply voltage Vdd (at one terminal), and provides the clamped signal on path 256 (as described with reference to FIG. 3 below in further detail).
PGA 260 amplifies the clamped signal with a programable gain (generally set to take advantage of the full range of ADC 280). The amplified signal is provided on path 268. ADC 280 samples the amplified signal received on path 268, and converts each sampled values into a digital code representing the voltage level of the sample. The digital code is provided to post processor 160 as digital input representing the image.
The manner in which capacitor 210 and switch 220 operate as clamping circuit is described below with an example input signal received on path 101. The description further demonstrates the manner in which a varying cross terminal voltage is applied across switch 220.
FIG. 3 is a graph illustrating the clamping operation with respect to an example input signal. The graph is shown containing wave forms 320, 340 and 360. Waveform 320 represents an example input signal received on path 101. The input signal encodes pixel values in a format suitable for recovering according to correlation double sampling (CDS), which implies the pixel value equals the difference of voltage level in durations 321 and 325. The voltage level in duration 321 is represented by V321 (8 Volts in the diagram).
Waveform 340 represents a control signal to switch 220, with a high logic value closing switch (turning on) and logic low opening switch (turning off). Waveform 340 is shown at logic high in durations 321, which charges capacitor 210 to (V331-Vdd). As a result, capacitor 210 acts like a battery with voltage (V331-Vdd) when switch 220 is open in durations 325.
Consequently, when switch 220 is open, the voltage on path 256 equals the difference of the input signal with the battery voltage. The resulting signal is shown on waveform 360. Each pixel value is determined by subtracting a digital value representing a difference of Vdd and the signal level in duration 365.
From the above, it can be readily seen that the cross terminal voltage across switch 220 varies substantially over time (since one terminal is at a substantially fixed voltage Vdd, while the voltage at the other terminal varies as represented by waveform 360). Challenges may be presented in designing such a circuit, as described below with an example implementation of switch 220.
FIG. 4 is a circuit diagram illustrating the details of switch 220 in one prior embodiment. Switch 220 is shown containing PMOS transistor 450 and booster circuit 420. PMOS transistor 450 is shown having drain terminal connected to Vdd and source terminal connected to path 256 (and thus waveform 360).
Booster circuit 420 receives control signal 340 (potentially of low voltage level equaling the operating voltage of AFE 100) and provides a high voltage signal at the gate terminal when waveform 340 is at logic low. The voltage level needs to be high enough to ensure that Vgs is greater than the corresponding pinch-off voltage even for the highest/ maximum value of Vds (which would occur in durations 325 of waveform 360). That is, the high voltage generated by booster circuit is needed to turn off switch 220.
The circuit of FIG. 4 presents various disadvantages. For example, booster circuit may consume unacceptably high power and space, in addition to adding complexities associated with the corresponding implementation. What is therefore needed is a switch addressing one or more of the requirements/disadvantages noted above.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.